HMMER performance model for multicore architectures

Sebastian Isaza*, Ernst Houtgast, Georgi Gaydadjiev

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1 Citation (Scopus)

Abstract

Exponential growth in biological sequence data combined with the computationally intensive nature of bioinformatics applications results in a continuously rising demand for processing power. In this paper, we propose a performance model that captures the behavior and performance scalability of HMMER, a bioinformatics application that identifies similarities between protein sequences and a protein family model. With our analytical model, the optimal master-worker ratio for a user scenario can be estimated. The model is evaluated and is found accurate with less than 2% error. We applied our model to a widely used heterogeneous multicore, the Cell BE, using the PPE and SPEs as master and workers respectively. Experimental results show that for the current parallelization strategy, the I/O speed at which the database is read from disk and the inputs pre-processing are the two most limiting factors in the Cell BE case.

Original languageEnglish
Title of host publicationProceedings - 2011 14th Euromicro Conference on Digital System Design
Subtitle of host publicationArchitectures, Methods and Tools, DSD 2011
PublisherIEEE
Pages257-261
Number of pages5
ISBN (Print)9780769544946
DOIs
Publication statusPublished - 1-Nov-2011
Externally publishedYes
Event2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011 - Oulu, Finland
Duration: 31-Aug-20112-Sep-2011

Publication series

NameProceedings - 2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011

Conference

Conference2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011
Country/TerritoryFinland
CityOulu
Period31/08/201102/09/2011

Keywords

  • Bioinformatics
  • HMMER
  • Multicore architectures
  • Performance model

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