Power-Efficient Estimation of Silicon Neuron Firing Rates with Floating-Gate Transistors

S. Nease, E. Chicca

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademic

1 Citation (Scopus)


Many subsystems in the brain require an estimate of neural activity to function properly. For example, models of neural homeostasis and synaptic plasticity incorporate these estimates. In this paper we present a method for estimating a neuromorphic neuron's firing rate using floating-gate transistors, which allow for the long time constants required for rate estimation and homeostatic plasticity. We simulate a modified leaky integrate-and-fire neuron connected to this rate detection circuit and characterize its response. We also show that the circuit's steady-state floating-gate voltages yield lower currents than similar methods. The primary benefits of this scheme are low power consumption and compactness.
Original languageEnglish
Title of host publication2015 European Conference on Circuit Theory and Design (ECCTD)
Number of pages4
Publication statusPublished - 2015
Externally publishedYes

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