Trends in tests and failure mechanisms in deep sub-micron technologies

Said Hamdioui*, Zaid Al-Ars, Lotfi Mhamdi, Georgi Gaydadjiev, Stamatis Vassiliadis

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

5 Citations (Scopus)

Abstract

The increasing integration density of semicon-ductor devices and the usage of new materials and inno-vative manufacturing techniques result in introducing new and gradually changing the types of failure mechanisms and defects that take place in manufactured silicon. This is particularly true for current deep sub-micron manufactur-ing technologies. As we approach the nanoscale domain, new types of fault models and test methods are needed to cope with the increasing complexity of the observed faulty behavior. This paper discusses the latest trends in testing and failure mechanisms in all stages of IC production.

Original languageEnglish
Title of host publicationInternational Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006.
PublisherIEEE
Pages216-221
Number of pages6
ISBN (Print)9780-7803-9726-6
DOIs
Publication statusPublished - 1-Dec-2006
Externally publishedYes
Event2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006 - Tunis, Tunisia
Duration: 5-Sept-20067-Sept-2006

Conference

Conference2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006
Country/TerritoryTunisia
CityTunis
Period05/09/200607/09/2006

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