TY - GEN
T1 - Memory testing with a RISC microcontroller
AU - Van De Goor, Ad
AU - Gaydadjiev, Georgi
AU - Hamdioui, Said
PY - 2010/6/9
Y1 - 2010/6/9
N2 - Many systems are based on embedded microcontrollers. Applications demand for production and Power-On testing, including memory testing. Because low-end microcontrollers may not have memory BIST, the CPU will be the only resource to perform at least the Power-On tests. This paper shows the problems, solutions and limitations of CPU-based at-speed memory testing, illustrated with examples from the ATMEL RISC microcontroller.
AB - Many systems are based on embedded microcontrollers. Applications demand for production and Power-On testing, including memory testing. Because low-end microcontrollers may not have memory BIST, the CPU will be the only resource to perform at least the Power-On tests. This paper shows the problems, solutions and limitations of CPU-based at-speed memory testing, illustrated with examples from the ATMEL RISC microcontroller.
UR - http://www.scopus.com/inward/record.url?scp=77953093461&partnerID=8YFLogxK
U2 - 10.1109/DATE.2010.5457210
DO - 10.1109/DATE.2010.5457210
M3 - Conference contribution
AN - SCOPUS:77953093461
SN - 978-1-4244-7054-9
T3 - Proceedings -Design, Automation and Test in Europe, DATE
SP - 214
EP - 219
BT - 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010)
PB - IEEE
T2 - Design, Automation and Test in Europe Conference and Exhibition, DATE 2010
Y2 - 8 March 2010 through 12 March 2010
ER -