Memristor-Based Cognitive and Energy Efficient In-Network Processing

Enabling communication in the Internet heavily depends on programmable match-action processors. Match-action processors in switches and routers match Internet traffic, i.e., header information of incoming IP packets, against locally available network rules to perform actions such as forwarding, modifying, and filtering Internet traffic. Match-action processing must be performed at high speed, i.e., commonly within one clock cycle. Building on transistor-based designs, state-of-the-art architectures, e.g., Ternary Content Addressable Memory (TCAM), have high energy consumption and lack cognitive functionality for performing appropriate actions. In this research, we demonstrate findings on enhancing match-action processors with memristors. We propose a novel memristive design for TCAM which enables more energy-efficient and cognitive operations on Internet traffic at the same processing rate of one clock cycle. We analyze its performance over Nb-doped SrTiO3-based memristor. Our analysis shows promising improvements in power consumption of 16 μW and 1 μW for match and mismatch operations along with twice the improvement in resources density to traditional architectures.