Multimedia rectangularly addressable memory

G. Kuzmanov*, G. Gaydadjiev, S. Vassiliadis

*Bijbehorende auteur voor dit werk

Onderzoeksoutput: ArticleAcademicpeer review

25 Citaten (Scopus)


We propose a scalable data alignment scheme incorporating module assignment functions and a generic addressing function for parallel access of randomly aligned rectangular blocks of data. The addressing function implicitly embeds the module assignment functions and it is separable, which potentially enables short critical paths and saves hardware resources. We also discuss the interface between the proposed memory organization and a linearly addressable memory. An implementation, suitable for MPEG-4 is presented and mapped onto an FPGA technology as a case study. Synthesis results indicate reasonably small hardware costs in the order of up to a few thousand FPGA slices for an exemplary 512 x 1024 two-dimensional (2-D) addressable space and a range of access pattern dimensions. Experiments suggest that speedups close to 8x can be expected when compared to linear addressing schemes.

Originele taal-2English
Pagina's (van-tot)315-322
Aantal pagina's8
TijdschriftIeee transactions on multimedia
Nummer van het tijdschrift2
StatusPublished - apr.-2006
Extern gepubliceerdJa

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