Samenvatting
The increasing integration density of semicon-ductor devices and the usage of new materials and inno-vative manufacturing techniques result in introducing new and gradually changing the types of failure mechanisms and defects that take place in manufactured silicon. This is particularly true for current deep sub-micron manufactur-ing technologies. As we approach the nanoscale domain, new types of fault models and test methods are needed to cope with the increasing complexity of the observed faulty behavior. This paper discusses the latest trends in testing and failure mechanisms in all stages of IC production.
Originele taal-2 | English |
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Titel | International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006. |
Uitgeverij | IEEE |
Pagina's | 216-221 |
Aantal pagina's | 6 |
ISBN van geprinte versie | 9780-7803-9726-6 |
DOI's | |
Status | Published - 1-dec.-2006 |
Extern gepubliceerd | Ja |
Evenement | 2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006 - Tunis, Tunisia Duur: 5-sep.-2006 → 7-sep.-2006 |
Conference
Conference | 2006 International Conference on Design and Test of Integrated Systems in Nanoscale Technology, IEEE DTIS 2006 |
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Land/Regio | Tunisia |
Stad | Tunis |
Periode | 05/09/2006 → 07/09/2006 |